Kelsey Lee
FT232R v2.16 specifies VCC = 4.0-5.25 V for the internal oscillator and 3.3-5.25 V with an external crystal. VCCIO is a separate 1.8-5.25 V supply for UART/CBUS levels. A 3.3 V UART can therefore coexist with a USB-powered core. Identify VCC and VCCIO separately before diagnosing enumeration or evaluating a successor.
Retain the required USB VID/PID, descriptors, serial-number policy, CBUS functions, signal inversion and power descriptors. FT232R reads its EEPROM after power-on or USB reset. Include enumeration, reconnect, suspend/resume and any CBUS-controlled clock or power signal in the verification procedure. Table 3.9 notes that CBUS clock outputs stop during USB suspend.
Identify the clock source and 3V3OUT startup load. AN_560 v1.2 compares a 1.98 V RN OSCI maximum with 3.63 V for R and flags loads above 25 mA without gating. RN v1.5 also calls for an external active-clock level below 1.98 V. Match these dated limits to the offered silicon revision and applicable errata, then test repeated cold-start enumeration before changing the BOM.
FT232RNL-REEL follows FTDI's named SSOP-28 successor path, subject to its migration conditions. FT231XS-R is an SSOP-20 redesign option. The latter changes package and CBUS count: FT232R v2.16 Table 10.1 lists five CBUS pins for R and four for FT231X. Compare actual control signals, configuration and firmware/driver use rather than selecting solely by USB-to-UART function.
Use separate lines with complete codes, quantities, required dates, carriers and lot documents. R v2.16 and RN v1.5 each list 2,000 devices per SSOP factory reel; supplier MOQ needs confirmation. For RN evaluation, state the acceptable silicon revision and EEPROM verification requirements. If inspection includes X-ray, agree the sequence and configuration readback: RN v1.5 warns of possible EEPROM corruption. A last-order deadline requires an actual discontinuance notice.
Category: Component Sourcing
By Kelsey Lee
FT232RL-REEL is the reel-delivered SSOP-28 version of FTDI's USB-to-UART bridge. FTDI lists FT232RL as NRND and provides a migration route to FT232RNL. The choice between repeat purchasing and migration depends on the released board, clock arrangement and startup loading, not only on the bridge's nominal UART function.
A released product can have a perfectly working USB interface and still need a sourcing review. FTDI's product catalog lists FT232RL as not recommended for new design (NRND). That is a reason to open a migration workstream. It is not a dated discontinuance notice or evidence that a specific quantity is unavailable.
The immediate purchasing question is whether engineering can preserve the released BOM while it evaluates a supported alternative. The answer depends on actual supply confirmation, the product's service horizon and the time needed to validate a change. There is no universal inventory quantity that follows from NRND alone.
FTDI's FT232R datasheet, version 2.16, page 3, ties the RL code to SSOP-28 and the reel arrangement to 2,000 devices. Page 31 gives a nominal 5.30 x 10.20 mm body and 0.65 mm lead pitch. Use that exact package on the BOM and check the offered carrier with the seller. Check the host's driver support separately from the hardware specification.
Figure 1. Keep unchanged FT232RL-REEL production material separate from FT232RNL-REEL evaluation. Migration checks cover clock, startup, silicon revision, EEPROM and regression; commercial confirmation is not engineering release. NRND alone supplies neither inventory evidence nor an EOL date.
The FT232R stores USB descriptors and configurable CBUS functions in internal EEPROM. A repeat purchase therefore needs a defined programming policy as well as a physical component. Document whether production uses factory defaults or a project-specific image, and retain that image with its verification procedure.
Changing descriptors or control-pin behavior can affect how the host identifies the unit and how the board powers attached circuitry. A bench UART loopback answers only a small part of that question. The product should also enumerate correctly, survive reconnects, enter and leave suspend, and behave as intended when one side of the interface loses power.
FT232RL-REEL power sequencing starts by separating VCC, VCCIO and 3V3OUT. Table 5.2 specifies VCC = 4.0-5.25 V with the internal oscillator, while VCCIO can operate at 1.8-5.25 V. A design using a 3.3 V UART can therefore still power the core from USB VBUS. CBUS clock outputs also stop during USB suspend, as the Table 3.9 footnote states. Include any dependent MCU clock or power-enable function in reconnect and suspend tests. FT232R v2.16, pp.11,15,21-22
Select tests from the features the released design actually uses. A CBUS clock needs suspend/resume checks; an EEPROM-controlled power-enable signal needs its expected state transitions recorded. Keep the configuration manifest and results with the released board revision.
For RN evaluation material, include inspection order in that manifest. FT232RN v1.5, Section 5.3 warns that X-ray inspection could corrupt EEPROM content. If the incoming-quality plan uses X-ray, agree the programming and inspection sequence, then verify the required configuration afterward. A package inspection and a successful UART loopback answer different acceptance questions.
For related board-bring-up reading, YG GROUP's LPC1343FBD48 USB discussion follows another USB implementation. Keep the FT232R bridge's EEPROM, CBUS and suspend dependencies attached to this board's test plan rather than borrowing another device's initialization procedure.
FTDI's AN_560, version 1.2, July 27, 2023 maps FT232RL to FT232RNL in the same SSOP-28 class. The FT232RN datasheet, v1.5, December 12, 2024, confirms the RNL package and supply range. Match these dated specifications and the applicable errata to the silicon revision offered for the project; an unchanged package is only one part of the migration decision.
Table 1. Migration questions that can change the work estimate
| Existing design condition | Dated manufacturer finding | Engineering task |
|---|---|---|
| An external active clock drives OSCI | AN_560 v1.2 compares R's 3.63 V maximum with RN's 1.98 V; RN v1.5 Section 7.6 calls for a clock level below 1.98 V | Check actual amplitude, clock mode and revision-specific errata |
| External circuitry loads 3V3OUT before enumeration | AN_560 v1.2 warns of enumeration problems above 25 mA startup loading without power gating; normal-operation capability is 50 mA | Assess the startup current and control when external loads receive power |
| Core uses the internal clock at 3.3 V | R v2.16 requires at least 4.0 V; RN v1.5 specifies 3.3-5.25 V | Recheck supply tolerance, VCCIO and board startup before using the lower-voltage option |
Sources: FTDI AN_560 v1.2, sections 2.1-2.4; FT232R v2.16 Table 5.2; FT232RN v1.5 Table 5.2 and Section 7.6. AN_560's silicon baseline is R revision C and RN revision B. Its startup text distinguishes below and above 25 mA without resolving the exact boundary; use margin and verify the actual lot's applicable guidance.
The distinction between an external crystal and an externally driven oscillator matters here. They are not interchangeable descriptions. Identify the actual circuit first, then apply the correct migration paragraph. A purchasing manager can prevent wasted evaluation time by asking for that schematic fact before requesting a successor quotation.
The 3V3OUT case is equally concrete: 50 mA during normal operation is different from the startup condition described in AN_560 v1.2. For the documented case, FTDI prefers PWREN#-controlled power gating with a 10-kilohm pull-up and a MOSFET, which requires a board change. The note also lists a 200 ms load delay and a custom FT_PROG option obtained through FTDI. Select a remedy for the actual circuit and silicon guidance rather than treating a delay value as a universal fix.
Keep the startup review tied to the offered RN silicon revision. Establish the load connected to 3V3OUT during startup, whether a controlled power switch is present, and how enumeration behaves across repeated cold starts. Include the EEPROM clock selection and power descriptors in that record, alongside the programming-tool version and host-driver regression.
Figure 2. RN v1.5 requires an externally driven OSCI clock below 1.98 V. AN_560 v1.2 warns about startup loading above 25 mA without gating, separately from 50 mA normal operation, and does not resolve exactly 25 mA. Its R-C/RN-B baseline requires matching the actual silicon revision and errata; no universal migration approval is shown.
FT232RL-REEL alternatives include a named successor and a redesign option. Keep their quantities and engineering work separate from unchanged production material.
Table 2. Related USB-to-UART ordering codes
| Complete code | Relationship | Distinct work item |
|---|---|---|
| FT232RNL-REEL | FTDI's R-to-RN route; RN v1.5 lists SSOP-28 and 2,000 devices per reel | Clock, startup, EEPROM and inspection checks for the actual silicon revision |
| FT231XS-R | Another FTDI USB-to-UART device, SSOP-20 | PCB/pin changes and feature/configuration comparison; a redesign option |
Sources: FT232RN v1.5, Sections 1.2 and 10, FT232RNL product page, FT231XS product page and AN_560. Confirm applicable specifications and errata before releasing a production change.
The FT232RL-REEL vs FT232RNL-REEL decision starts with clock topology, startup load and EEPROM settings in the existing SSOP-28 board. The FT231XS-R route is more useful when a PCB revision is already planned: its SSOP-20 package and four CBUS pins differ from the FT232R's SSOP-28 and five CBUS pins in v2.16 Table 10.1. Allocate those board and configuration changes before comparing component quotations.
Neither option establishes a better landed cost without quotations. Compare component cost, assembly changes, programming steps, regression effort and production disruption. A small per-device saving may be irrelevant if a rushed migration interrupts a scheduled build. Equally, recurring purchases of the mature code should not postpone a needed design review indefinitely.
For current production, release only the approved BOM unless the change process authorizes another part. Confirm the actual supply offer by full code, carrier, lot documentation and delivery terms. NRND is not permission to accept any USB bridge that appears in a search result.
For migration, keep a small, representative qualification build separate from production inventory. Record the old and new codes, the EEPROM configuration, the schematic dependencies and the test results. Once the change passes, update the BOM, programming instructions and purchasing specification together. An alternative entered only in a procurement spreadsheet can otherwise reach a line that still follows the old test procedure.
FT232RL-REEL replenishment and FT232RNL qualification are different decisions that can proceed in parallel. The first protects an unchanged build with confirmed material. The second reduces future dependence through a controlled change.
The strongest justification for either path is the actual board and its documented interface behavior. Start with clock topology and startup loading, then assign the qualification workload. That turns an NRND label into an actionable procurement plan while keeping the migration exceptions visible.
Request an FT232RL-REEL quote for the unchanged production BOM, stating quantity, need-by date, reel conditions and required lot records. List FT232RNL-REEL evaluation material separately, including acceptable silicon revision, EEPROM requirements and any inspection/readback sequence. Confirm the offered code, carrier, MOQ and delivery terms; keep engineering release separate from the commercial offer.